Everything about Superscalar processor
CPU that implements instruction-level parallelism within a single processor
A superscalar processor is a CPU that implements a form of parallelism called instruction-level parallelism within a single processor. In contrast to a scalar processor, which can execute at most one single instruction per clock cycle, a superscalar processor can execute or start executing more than one instruction during a clock cycle by simultaneously dispatching multiple instructions to different execution units on the processor. It therefore allows more throughput than would otherwise be possible at a given clock rate. Each execution unit is not a separate processor, but an execution resource within a single CPU such as an arithmetic logic unit. Wikipedia →
🧭 Start here: a 6-step reading path
- Read the overview: Superscalar processorA 5-minute orientation
- Skim a recent paper: Super-K: A Superscalar CRYSTALS-KYBER Processor Based on Efficient Arithmetic ArrayInfluential work since 2022
- Pick up a classic book: Evaluating the Impact of Designing and Testing of High Performance Pipeline Functional Units by Using Verilog Hardware Description Language about Superscalar and DSP Processors and their Usage in Complex DSP AlgorithmsThe most-reprinted book on the subject
- Read the landmark paper: The Mips R10000 superscalar microprocessorCited 567 times
- Go sideways: Very long instruction wordA closely related topic
- Go sideways: MicroarchitectureA closely related topic
📖 Definitions
No dictionary entry for this exact phrase.
🗂️ The subject at a glance
🏆 Landmark papers (most cited)
The Mips R10000 superscalar microprocessor
A First-Order Superscalar Processor Model
An optimal instruction scheduler for superscalar processor
V830R/AV: embedded multimedia superscalar RISC processor
Spyder: A SURE (SUperscalar and REconfigurable) processor
System-level power consumption modeling and tradeoff analysis techniques for superscalar processor design
Mechanistic Analytical Modeling of Superscalar In-Order Processor Performance
Decoupling local variable accesses in a wide-issue superscalar processor
🆕 Influential since 2022
Super-K: A Superscalar CRYSTALS-KYBER Processor Based on Efficient Arithmetic Array
Efficient Prefetch and Issue Scheduling Approaches for Simultaneous Multithreading Applied to Superscalar RISC-V Processor
W-IQ: Wither-logic based issue queue for RISC-V superscalar out-of-order processor
Hyper-Parallel Superscalar Asynchronous RISC-V Processor Based on Event-Driven Logic
Automated Superscalar Processor Design by Learning Data Dependencies
📚 Books worth reading
Ranked by number of editions on Open Library, a rough measure of how lasting a book is.
🔗 Related topics
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Evaluating the Impact of Designing and Testing of High Performance Pipeline Functional Units by Using Verilog Hardware Description Language about Superscalar and DSP Processors and their Usage in Complex DSP Algorithms