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Everything about Pin grid array
Type of integrated circuit packaging
A pin grid array (PGA) is a type of integrated circuit packaging. In a PGA, the package is square or rectangular, and the pins are arranged in a regular array on the underside of the package. The pins are commonly spaced 2.54 mm (0.1") apart, and may or may not cover the entire underside of the package. 1.27 mm (0.05") is commonly used with higher pin count PGAs. Wikipedia →
🧭 Start here: a 6-step reading path
- Read the overview: Pin grid arrayA 5-minute orientation
- Skim a recent paper: MCMCF-Router: Multi-capacity Ordered Escape Routing Algorithms for Grid/Staggered Pin ArrayInfluential work since 2022
- Pick up a classic book: The Conspirators HierarchyThe most-reprinted book on the subject
- Read the landmark paper: Thermal Studies on Pin Grid Array Packages for High Density LSI and VLSI Logic CircuitsCited 28 times
- Go sideways: Ball grid arrayA closely related topic
- Go sideways: Land grid arrayA closely related topic
📖 Definitions
No dictionary entry for this exact phrase.
🗂️ The subject at a glance
🏆 Landmark papers (most cited)
Thermal Studies on Pin Grid Array Packages for High Density LSI and VLSI Logic Circuits
Optimization of high pin count cavity-up enhanced plastic ball grid array (EPBGA) packages for robust design
Inductance calculation and optimal pin assignment for the design of pin-grid-array and chip carrier packages
Thermal performance comparison of high pin count cavity-up enhanced plastic ball grid array (EPBGA) packages
Fatigue Analysis of a Ceramic Pin Grid Array Soldered to an Orthotropic Epoxy Substrate
Automatic router for the pin grid array package
Automated pin grid array package routing on multilayer ceramic substrates
High speed electrical characterization and simulation of a pin grid array package
🆕 Influential since 2022
MCMCF-Router: Multi-capacity Ordered Escape Routing Algorithms for Grid/Staggered Pin Array
Key-pin-position and Gaussian-L2-distance based rigid registration for accurate and fast location of ball grid array chip
Clustered-based Multi-pin Substrate Routing Optimization for Fine-Pitch Ball Grid Array
Evolutionary Multiobjective T-Matrix Assisted Pin Map Optimization for Ball Grid Array Design
📚 Books worth reading
The Conspirators HierarchyJohn Coleman · 1992- 📕Chip carrier, pin grid array, TAB-AnwendungHelmut Müller · 1984
Ranked by number of editions on Open Library, a rough measure of how lasting a book is.
🔗 Related topics
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