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Everything about OpenRISC
Microprocessor development project
OpenRISC is a project to develop a series of open-source hardware based central processing units (CPUs) on established reduced instruction set computer (RISC) principles. It includes an instruction set architecture (ISA) using an open-source license. It is the original flagship project of the OpenCores community. Wikipedia →
🧭 Start here: a 6-step reading path
- Read the overview: OpenRISCA 5-minute orientation
- Pick up a classic book: Information and Communicatiaon TechnologyThe most-reprinted book on the subject
- Read the landmark paper: SERSim: a soft error rate simulator and a case study for a 32-bit OpenRisc 1200 microprocessorCited 2 times
- Go sideways: List of Linux-supported computer architecturesA closely related topic
- Go sideways: OpenRISC 1200A closely related topic
📖 Definitions
No dictionary entry for this exact phrase.
🗂️ The subject at a glance
🏆 Landmark papers (most cited)
SERSim: a soft error rate simulator and a case study for a 32-bit OpenRisc 1200 microprocessor
The Compressed Instruction Set Architecture for the OpenRISC Processor
Perancangan dan Implementasi Soft Processor Berdasarkan Arsitektur OpenRISC 1200 pada FPGA
The Design of Controller in AVS Video Decoder Chip Based on Openrisc
Implementation, Verification and Validation of an OpenRISC-1200 Soft-core Processor on FPGA
A Cross-Platform Toolchain for Migrating Software to an OpenRISC-Based FPGA SoC
📚 Books worth reading
Information and Communicatiaon TechnologyKhabib Mustofa · 2013
Ranked by number of editions on Open Library, a rough measure of how lasting a book is.
🔗 Related topics
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