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Everything about Memory-level parallelism
Computer architecture feature
In computer architecture, memory-level parallelism (MLP) is the ability to have pending multiple memory operations, in particular cache misses or translation lookaside buffer (TLB) misses, at the same time. Wikipedia →
🧭 Start here: a 6-step reading path
- Read the overview: Memory-level parallelismA 5-minute orientation
- Skim a recent paper: Improving Bank-Level Parallelism for In-Memory Checkpointing in Hybrid Memory SystemsInfluential work since 2022
- Pick up a classic book: Alice's Adventures in WonderlandThe most-reprinted book on the subject
- Read the landmark paper: An analytical model for a GPU architecture with memory-level and thread-level parallelism awarenessCited 148 times
- Go sideways: Hardware scoutA closely related topic
- Go sideways: Superscalar processorA closely related topic
📖 Definitions
No dictionary entry for this exact phrase.
🗂️ The subject at a glance
No outline available.
🏆 Landmark papers (most cited)
An analytical model for a GPU architecture with memory-level and thread-level parallelism awareness
Microarchitecture Optimizations for Exploiting Memory-Level Parallelism
Efficiently exploiting memory level parallelism on asymmetric coupled cores in the dark silicon era
Modeling Superscalar Processor Memory-Level Parallelism
The impact of exploiting instruction-level parallelism on shared-memory multiprocessors
A Novel NAND Flash Memory Architecture for Maximally Exploiting Plane-Level Parallelism
Enhancing Memory-Level Parallelism via Recovery-Free Value Prediction
Identifying the optimal level of parallelism in transactional memory applications
🆕 Influential since 2022
📚 Books worth reading
Alice's Adventures in WonderlandLewis Carroll · 1865
Invitation to Computer ScienceG. Michael Schneider, Judith L. Gersting · 1995
Cartesian meditationsEdmund Husserl, Dorion Cairns · 1960
Computer architectureJohn L. Hennessy, David A. Patterson · 1989
Treaty Occupationay ToxicologySuelen Queiroz · 2010
The Conspirators HierarchyJohn Coleman · 1992
Computer Architecture and OrganizationJohn P. Hayes · 2002
Practical Electronics for InventorsPaul Scherz · 2000
Ranked by number of editions on Open Library, a rough measure of how lasting a book is.
🔗 Related topics
- Hardware scout Hardware scout is a technique that uses otherwise idle processor execution resources to perform prefetching during cache misses. When a thread is stalled…
- Superscalar processor A superscalar processor (or multiple-issue processor) is a CPU that implements a form of parallelism called instruction-level parallelism within a single…
- Instruction-level parallelism Instruction-level parallelism (ILP) is the parallel or simultaneous execution of a sequence of instructions in a computer program. More specifically, ILP…
- Simultaneous multithreading Simultaneous multithreading (SMT) is a technique for improving the overall efficiency of superscalar CPUs with hardware multithreading. SMT permits multiple…
- Microarchitecture In electronics, computer science and computer engineering, microarchitecture, also called computer organization and sometimes abbreviated as μarch or uarch…
- Cache prefetching Cache prefetching is a technique used by central processing units (CPUs) to boost execution performance by fetching instructions or data from their primary…
- Alpha 21464 The Alpha 21464 is an unfinished microprocessor that implements the Alpha instruction set architecture (ISA) developed by Digital Equipment Corporation…
- Multithreading (computer architecture) In computer architecture, multithreading is the ability of a central processing unit (CPU) (or a single core in a multi-core processor) to provide multiple…