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Everything about Binary-coded decimal
System of digitally encoding numbers
In computing and electronic systems, binary-coded decimal (BCD) is a class of binary encodings of decimal numbers where each digit is represented by a fixed number of bits, usually four or eight. Sometimes, special bit patterns are used for a sign or other indications. Wikipedia →
🧭 Start here: a 6-step reading path
- Read the overview: Binary-coded decimalA 5-minute orientation
- Skim a recent paper: Design of efficient binary-coded decimal adder in QCA technology with a regular clocking schemeInfluential work since 2022
- Pick up a classic book: Digital CircuitsThe most-reprinted book on the subject
- Read the landmark paper: Efficient approaches for designing reversible Binary Coded Decimal addersCited 106 times
- Go sideways: Intel BCD opcodesA closely related topic
- Go sideways: Decimal computerA closely related topic
📖 Definitions
Noun A decimal number encoded in such a way that each decimal digit is represented by its own binary sequence, simplifying conversion between binary and decimal, and allowing exact representation of decimal fractions.
🏆 Landmark papers (most cited)
Efficient approaches for designing reversible Binary Coded Decimal adders
Binary-coded decimal digit multipliers
Design of a compact reversible binary coded decimal adder circuit
RBCD: redundant binary coded decimal adder
Optimized reversible binary-coded decimal adders
Novel designs for fault tolerant reversible binary coded decimal adders
Method of all-optical frequency encoded decimal to binary and binary coded decimal, binary to gray, and gray to binary data conversion using semiconductor optical amplifiers
Design and study of silicon microring resonator based all-optical binary-coded decimal adder
🆕 Influential since 2022
Design of efficient binary-coded decimal adder in QCA technology with a regular clocking scheme
Modeling of binary-coded decimal to seven segment display decoder using silicon microring resonator-based programmable logic device
High-speed binary coded decimal digit multipliers with multiple error detection
Design and Implementation of Low Power Generic Reversible Binary-Coded Decimal Adder on Artix-7 FPGA
Field Programmable Gate Array Implementation of Reversible Binary Coded Decimal Multiplier
📚 Books worth reading
- 📕Digital CircuitsAmalou Abdelilah · 1989
Decimal computationSchmid, Hermann · 1974
Ranked by number of editions on Open Library, a rough measure of how lasting a book is.
🔗 Related topics
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- Decimal64 floating-point format In computing, decimal64 is a decimal floating-point computer number format that occupies 8 bytes (64 bits) in computer memory. The format was formally…
- Decimal32 floating-point format In computing, decimal32 is a decimal floating-point computer numbering format that occupies 4 bytes (32 bits) in computer memory. Like the binary16 and…
- Computer number format A computer number format is the internal representation of numeric values in digital device hardware and software, such as in programmable computers and…
- Nibble In computing, a nibble, also spelled nybble to match byte, is a unit of information consisting of four bits, equivalent to one half of a byte or octet…
- Decimal128 floating-point format In computing, decimal128 is a decimal floating-point number format defined by the IEEE 754 Standard for Floating-Point Arithmetic. It is one of the standard's…
- Densely packed decimal Densely packed decimal (DPD) is an efficient method for binary encoding decimal digits. The traditional system of binary encoding for decimal digits, known…