Everything about Vector processor
Computer processor which works on arrays of several numbers at once
In computing, a vector processor is a central processing unit (CPU) that implements an instruction set where its instructions are designed to operate efficiently and architecturally sequentially on large one-dimensional arrays of data called vectors. When integrated as a hardware component the vector processor is often called a vector processing unit (VPU). This is in contrast to scalar processors, whose instructions operate on single data items only, and in contrast to some of those same scalar processors having additional single instruction, multiple data (SIMD) or SIMD within a register (SWAR) Arithmetic Units. Vector processors can greatly improve performance on certain workloads, notably numerical simulation, compression and similar tasks. Wikipedia →
đź§ Start here: a 6-step reading path
- Read the overview: Vector processorA 5-minute orientation
- Skim a recent paper: A large-scale integrated vector–matrix multiplication processor based on monolayer molybdenum disulfide memoriesInfluential work since 2022
- Pick up a classic book: CONPAR 90-VAPP IVThe most-reprinted book on the subject
- Read the landmark paper: Statistical inference in vector autoregressions with possibly integrated processesCited 4,289 times
- Go sideways: Single instruction, multiple dataA closely related topic
- Go sideways: Gather/scatterA closely related topic
đź“– Definitions
No dictionary entry for this exact phrase.
🗂️ The subject at a glance
🏆 Landmark papers (most cited)
Statistical inference in vector autoregressions with possibly integrated processes
The triangle processor and normal vector shader
Matrix multiplication by diagonals on a vector/parallel processor
Vector Processing as a Soft Processor Accelerator
A video digital signal processor with a vector-pipeline architecture
Acoustooptical matrix-vector product processor: implementation issues
An APL Compiler for a Vector Processor
Vector Processor Algorithms for Transonic Flow Calculations
🆕 Influential since 2022
A large-scale integrated vector–matrix multiplication processor based on monolayer molybdenum disulfide memories
Complex-valued matrix-vector multiplication using a scalable coherent photonic processor
Ara2: Exploring Single- and Multi-Core Vector Processing With an Efficient RVV 1.0 Compliant Open-Source Processor
An Eight-Core 1.44-GHz RISC-V Vector Processor in 16-nm FinFET
Waveguide-multiplexed photonic matrix–vector multiplication processor using multiport photodetectors
📚 Books worth reading
CONPAR 90-VAPP IVJoint International Conference on Vector and Parallel Processing (1st 1990 Zurich, Switzerland) · 1990- 📕Xiang liang ju xing jiQingshi Gao · 1983
- 📕Nonlinear structural response using adaptive dynamic relaxation on a massively-parallel-processing systemDavid R. Oakley · 1994
High Performance Computing on Vector Systems 2006: Proceedings of the High Performance Computing Center Stuttgart, March 2006Thomas Bönisch, Sunil Tiyyagura · 2007
Ranked by number of editions on Open Library, a rough measure of how lasting a book is.
đź”— Related topics
- Single instruction, multiple data Single instruction, multiple data (SIMD) is a type of parallel computing (processing) in Flynn's taxonomy. SIMD describes computers with multiple processing…
- Gather/scatter Gather/scatter is a type of memory addressing that at once collects (gathers) from, or stores (scatters) data to, multiple arbitrary memory indices. Examples…
- Predication (computer architecture) In computer architecture, predication is a feature that provides an alternative to conditional transfer of control, as implemented by conditional branch…
- Streaming SIMD Extensions In computing, Streaming SIMD Extensions (SSE) is a single instruction, multiple data (SIMD) instruction set extension to the x86 architecture, designed…
- AoS and SoA In computing, an array of structures (AoS), structure of arrays (SoA) or array of structures of arrays (AoSoA) are contrasting ways to arrange a sequence…
- Power ISA Power ISA is a reduced instruction set computer (RISC) instruction set architecture (ISA) currently developed by the OpenPOWER Foundation, led by IBM.…
- Automatic vectorization Automatic vectorization, in parallel computing, is a special case of automatic parallelization, where a computer program is converted from a scalar implementati…
- AltiVec AltiVec is a single-precision floating-point and integer SIMD instruction set designed and owned by Apple, IBM, and Freescale Semiconductor (formerly Motorola's…