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Everything about Time Stamp Counter

64-bit x86 register

The Time Stamp Counter (TSC) is a 64-bit register present on all x86 processors since the Pentium. It counts the number of CPU cycles since its reset. The instruction RDTSC returns the TSC in EDX:EAX. In x86-64 mode, RDTSC also clears the upper 32 bits of RAX and RDX. Its opcode is 0F 31. Pentium competitors such as the Cyrix 6x86 did not always have a TSC and may consider RDTSC an illegal instruction. Cyrix included a Time Stamp Counter in their MII. Wikipedia →

đź§­ Start here: a 6-step reading path

  1. Read the overview: Time Stamp CounterA 5-minute orientation
  2. Pick up a classic book: The history of Detroit and MichiganThe most-reprinted book on the subject
  3. Read the landmark paper: Enhancing time-stamp counter phase modulation measurementsCited 2 times
  4. Go sideways: High Precision Event TimerA closely related topic
  5. Go sideways: NetBurstA closely related topic

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🏆 Landmark papers (most cited)

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