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Everything about MultiProcessor Specification
Open standard for x86 multi-processors
The MultiProcessor Specification (MPS) for the x86 architecture is an open standard describing enhancements to both operating systems and firmware, which will allow them to work with x86-compatible processors in a multi-processor configuration. MPS covers Advanced Programmable Interrupt Controller (APIC) architectures. Wikipedia →
🧭 Start here: a 6-step reading path
- Read the overview: MultiProcessor SpecificationA 5-minute orientation
- Skim a recent paper: Market counterfactuals and the specification of multiproduct demand: A nonparametric approachInfluential work since 2022
- Pick up a classic book: The Data Center as a Computer (Synthesis Lectures on Computer Architecture)The most-reprinted book on the subject
- Read the landmark paper: The Lagrange Multiplier Test and its Applications to Model Specification in EconometricsCited 7,297 times
- Go sideways: ACPIA closely related topic
- Go sideways: High Precision Event TimerA closely related topic
📖 Definitions
No dictionary entry for this exact phrase.
🗂️ The subject at a glance
No outline available.
🏆 Landmark papers (most cited)
The Lagrange Multiplier Test and its Applications to Model Specification in Econometrics
Multiple imputation of discrete and continuous data by fully conditional specification
Neural Correlates of Reaching Decisions in Dorsal Premotor Cortex: Specification of Multiple Direction Choices and Final Selection of Action
System design of a CC-NUMA multiprocessor architecture using formal specification, model-checking, co-simulation, and test generation
Synchronization primitives for a multiprocessor: a formal specification
ITRON-MP: an adaptive real-time kernel specification for shared-memory multiprocessor systems
On specification of multiprocessor computing
Specification of schedulability assumptions to leverage multiprocessor Analysis
🆕 Influential since 2022
📚 Books worth reading
The Data Center as a Computer (Synthesis Lectures on Computer Architecture)Luiz André Barroso · 2008
Ranked by number of editions on Open Library, a rough measure of how lasting a book is.
🔗 Related topics
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- High Precision Event Timer The High Precision Event Timer (HPET) is a hardware timer available in modern x86-compatible personal computers. Compared to older types of timers available…
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- Physical Address Extension In computing, Physical Address Extension (PAE), sometimes referred to as Page Address Extension, is a memory management feature for the x86 architecture…
- Advanced Programmable Interrupt Controller The Advanced Programmable Interrupt Controller (APIC) is a family of programmable interrupt controllers developed by Intel. As its name suggests, the APIC…
- X86-64 x86-64 (also known as AMD64, x86_64, x64 and, rarely, Intel 64) is a 64-bit extension of the x86 instruction set. It was announced in 1999 and first available…