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Everything about Compute Express Link

Open standard processor interconnection for data centers

Compute Express Link (CXL) is an open standard interconnect for high-speed, high capacity CPU-to-device and CPU-to-memory connections, designed for high performance data center computers. CXL is built on the serial PCI Express (PCIe) physical and electrical interface and includes PCIe-based block input/output protocol (CXL.io) and new cache-coherent protocols for accessing system memory (CXL.cache) and device memory (CXL.mem). The serial communication and pooling capabilities allows CXL memory to overcome performance and socket packaging limitations of common DIMM memory when implementing high storage capacities. Wikipedia →

🧭 Start here: a 6-step reading path

  1. Read the overview: Compute Express LinkA 5-minute orientation
  2. Skim a recent paper: Compute Express Link Topology-Aware and Expander-Driven Prefetching: Unlocking Solid-State Drive PerformanceInfluential work since 2022
  3. Pick up a classic book: Fundamentals of Computer Programming with CSharp Free Book (by Nakov & Co.)The most-reprinted book on the subject
  4. Read the landmark paper: An Introduction to the Compute Express Link (CXL) InterconnectCited 138 times
  5. Go sideways: Coherent Accelerator Processor InterfaceA closely related topic
  6. Go sideways: Gen-Z (consortium)A closely related topic

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🏆 Landmark papers (most cited)

🆕 Influential since 2022

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