Live briefing
Everything about CPU cache
Hardware cache of a central processing unit
A CPU cache is a hardware cache used by the central processing unit (CPU) of a computer to reduce the average cost to access data from the main memory. A cache is a smaller, faster memory, located closer to a processor core, which stores copies of the data from frequently used main memory locations, avoiding the need to always refer to main memory which may be tens to hundreds of times slower to access. Wikipedia →
🧭 Start here: a 6-step reading path
- Read the overview: CPU cacheA 5-minute orientation
- Skim a recent paper: Revisiting PM-Based B-Tree With Persistent CPU CacheInfluential work since 2022
- Pick up a classic book: Modern Operating SystemsThe most-reprinted book on the subject
- Read the landmark paper: Evaluating associativity in CPU cachesCited 417 times
- Go sideways: Translation lookaside bufferA closely related topic
- Go sideways: Cache hierarchyA closely related topic
📖 Definitions
No dictionary entry for this exact phrase.
🏆 Landmark papers (most cited)
Evaluating associativity in CPU caches
Line (Block) Size Choice for CPU Cache Memories
In-cache query co-processing on coupled CPU-GPU architectures
Bibliography and reading on CPU cache memories and related topics
CPU cache prefetching: Timing evaluation of hardware implementations
Survey of CPU Cache-Based Side-Channel Attacks: Systematic Analysis, Security Models, and Countermeasures
CPU Scheduling for Power/Energy Management on Multicore Processors Using Cache Miss and Context Switch Data
Efficient Protection Mechanism for CPU Cache Flush Instruction Based Attacks
🆕 Influential since 2022
Revisiting PM-Based B-Tree With Persistent CPU Cache
Hardware support for contention tracking in CPU and GPU last-level cache
Novel CPU cache architecture based on two-dimensional MTJ device with ferromagnetic Fe3GeTe2
Design of Hierarchical Cache With Hybrid SOT- and STT-MRAM in Multi-Core CPU Environments
COMPAD: A heterogeneous cache-scratchpad CPU architecture with data layout compaction for embedded loop-dominated applications
📚 Books worth reading
Modern Operating SystemsAndrew S. Tanenbaum, Herbert Bos · 1992
Computer Engineering and TechnologyWeixia Xu · 2013
Computer ArchitectureJoseph D. Dumas II · 2005
Computer Architecture and OrganizationJohn P. Hayes · 2002
Clojure high performance programmingShantanu Kumar · 2013
Understanding Computers Today and TomorrowDeborah Morley · 2003
GPU computing gemsWen-mei Hwu · 2011
Cyber foragingJason Flinn · 2011
Ranked by number of editions on Open Library, a rough measure of how lasting a book is.
🔗 Related topics
- Translation lookaside buffer In computing and processor design, a translation lookaside buffer (TLB) is a memory cache that stores the recent translations of virtual memory addresses…
- Cache hierarchy Cache hierarchy, or multi-level cache, is a memory architecture that uses a hierarchy of memory stores based on varying access speeds to cache data. Highly…
- Memory management unit A memory management unit (MMU), sometimes called paged memory management unit (PMMU), is a computer hardware unit that examines all references to memory…
- List of Intel processors This list of Intel processors by generation attempts to present all of Intel's processors from the 4-bit 4004 (1971) to the present high-end offerings…
- Intel Core (microarchitecture) The Intel Core microarchitecture (provisionally referred to as Next Generation Micro-architecture, and developed as Merom) is a multi-core processor microarchit…
- Page Size Extension In computing, Page Size Extension (PSE) refers to a feature of x86 processors that allows for pages larger than the traditional 4 KiB size. It was introduced…
- Sempron Sempron has been the marketing name used by AMD for several different budget desktop CPUs, using several different technologies and CPU socket formats…
- Sunny Cove (microarchitecture) Sunny Cove is a codename for a CPU microarchitecture developed by Intel, first released in September 2019. It succeeds the Palm Cove microarchitecture…